vld2_lane_s16
SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
---|---|---|---|---|---|
Neon | int16x4x2_t | vld2_lane_s16 | (int16_t const * ptr, int16x4x2_t src, const int lane) | Load / Stride | |
Description Load multiple 2-element structures to two registers. This instruction loads multiple 2-element structures from memory and writes the result to the two SIMD&FP registers, with de-interleaving. Results Vt2.4H result.val[1]Vt.4H result.val[0] This intrinsic compiles to the following instructions: LD2 Argument Preparation ptr register: Xnsrc register: Vt2.4Hlane minimum: 0; maximum: 3 Architectures v7, A32, A64 Operation
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