Search all intrinsics
SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonint16x4_tvmin_s16(int16x4_t a, int16x4_t b)Vector arithmetic / Minimum
Description
Signed Minimum (vector). This instruction compares corresponding elements in the vectors in the two source SIMD&FP registers, places the smaller of each of the two signed integer values into a vector, and writes the vector to the destination SIMD&FP register.
Results
Vd.4H result
This intrinsic compiles to the following instructions:

SMIN Vd.4H,Vn.4H,Vm.4H

Argument Preparation
a register: Vn.4Hb register: Vm.4H
Architectures
v7, A32, A64

Operation

CheckFPAdvSIMDEnabled64();
bits(datasize) operand1 = V[n];
bits(datasize) operand2 = V[m];
bits(datasize) result;
integer element1;
integer element2;
integer maxmin;

for e = 0 to elements-1
    element1 = Int(Elem[operand1, e, esize], unsigned);
    element2 = Int(Elem[operand2, e, esize], unsigned);
    maxmin = if minimum then Min(element1, element2) else Max(element1, element2);
    Elem[result, e, esize] = maxmin<esize-1:0>;

V[d] = result;