Search all intrinsics
SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonfloat64x2_tvminnmq_f64(float64x2_t a, float64x2_t b)Vector arithmetic / Minimum
Description
Floating-point Minimum Number (vector). This instruction compares corresponding vector elements in the two source SIMD&FP registers, writes the smaller of the two floating-point values into a vector, and writes the vector to the destination SIMD&FP register.
Results
Vd.2D result
This intrinsic compiles to the following instructions:

FMINNM Vd.2D,Vn.2D,Vm.2D

Argument Preparation
a register: Vn.2Db register: Vm.2D
Architectures
A64

Operation

CheckFPAdvSIMDEnabled64();
bits(datasize) operand1 = V[n];
bits(datasize) operand2 = V[m];
bits(datasize) result;
bits(2*datasize) concat = operand2:operand1;
bits(esize) element1;
bits(esize) element2;

for e = 0 to elements-1
    if pair then
        element1 = Elem[concat, 2*e, esize];
        element2 = Elem[concat, (2*e)+1, esize];
    else
        element1 = Elem[operand1, e, esize];
        element2 = Elem[operand2, e, esize];

    if minimum then
        Elem[result, e, esize] = FPMinNum(element1, element2, FPCR[]);
    else
        Elem[result, e, esize] = FPMaxNum(element1, element2, FPCR[]);

V[d] = result;