vmlsl_high_lane_u32
SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
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Neon | uint64x2_t | vmlsl_high_lane_u32 | (uint64x2_t a, uint32x4_t b, uint32x2_t v, const int lane) | Scalar arithmetic / Vector multiply-subtract by scalar | |
Description Unsigned Multiply-Subtract Long (vector, by element). This instruction multiplies each vector element in the lower or upper half of the first source SIMD&FP register by the specified vector element of the second source SIMD&FP register and subtracts the results from the vector elements of the destination SIMD&FP register. The destination vector elements are twice as long as the elements that are multiplied. Results Vd.2D result This intrinsic compiles to the following instructions: UMLSL2 Argument Preparation a register: Vd.2Db register: Vn.4Sv register: Vm.2Slane minimum: 0; maximum: 1 Architectures A64 Operation
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