SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonuint32x4_tvmlsl_lane_u16(uint32x4_t a, uint16x4_t b, uint16x4_t v, const int lane)Scalar arithmetic / Vector multiply-subtract by scalar
Description
Vector widening multiply subtract with scalar
Results
Vd.4S result
This intrinsic compiles to the following instructions:

UMLSL Vd.4S,Vn.4H,Vm.H[lane]

Argument Preparation
a register: Vd.4Sb register: Vn.4Hv register: Vm.4Hlane minimum: 0; maximum: 3
Architectures
v7, A32, A64

Operation

No operation information.