vmull_laneq_s32
SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
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Neon | int64x2_t | vmull_laneq_s32 | (int32x2_t a, int32x4_t v, const int lane) | Scalar arithmetic / Vector multiply by scalar and widen | |
Description Signed Multiply Long (vector, by element). This instruction multiplies each vector element in the lower or upper half of the first source SIMD&FP register by the specified vector element of the second source SIMD&FP register, places the result in a vector, and writes the vector to the destination SIMD&FP register. Results Vd.2D result This intrinsic compiles to the following instructions: SMULL Argument Preparation a register: Vn.2Sv register: Vm.4Slane minimum: 0; maximum: 3 Architectures A64 Operation
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