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SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonuint32x4_tvmull_u16(uint16x4_t a, uint16x4_t b)Vector arithmetic / Multiply / Widening multiplication
Description
Unsigned Multiply long (vector). This instruction multiplies corresponding vector elements in the lower or upper half of the two source SIMD&FP registers, places the result in a vector, and writes the vector to the destination SIMD&FP register. The destination vector elements are twice as long as the elements that are multiplied. All the values in this instruction are unsigned integer values.
Results
Vd.4S result
This intrinsic compiles to the following instructions:

UMULL Vd.4S,Vn.4H,Vm.4H

Argument Preparation
a register: Vn.4Hb register: Vm.4H
Architectures
v7, A32, A64

Operation

CheckFPAdvSIMDEnabled64();
bits(datasize)   operand1 = Vpart[n, part];
bits(datasize)   operand2 = Vpart[m, part];
bits(2*datasize) result;
integer element1;
integer element2;

for e = 0 to elements-1
    element1 = Int(Elem[operand1, e, esize], unsigned);
    element2 = Int(Elem[operand2, e, esize], unsigned);
    Elem[result, e, 2*esize] = (element1 * element2)<2*esize-1:0>;

V[d] = result;