vmulxq_laneq_f32
SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
---|---|---|---|---|---|
Neon | float32x4_t | vmulxq_laneq_f32 | (float32x4_t a, float32x4_t v, const int lane) | Vector arithmetic / Multiply / Multiply extended | |
Description Floating-point Multiply extended. This instruction multiplies corresponding floating-point values in the vectors of the two source SIMD&FP registers, places the resulting floating-point values in a vector, and writes the vector to the destination SIMD&FP register. Results Vd.4S result This intrinsic compiles to the following instructions: FMULX Argument Preparation a register: Vn.4Sv register: Vm.4Slane minimum: 0; maximum: 3 Architectures A64 Operation
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