SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonint32x4_tvqdmlsl_lane_s16(int32x4_t a, int16x4_t b, int16x4_t v, const int lane)Vector arithmetic / Multiply / Saturating multiply-accumulate
Description
Vector widening saturating doubling multiply subtract with scalar
Results
Vd.4S result
This intrinsic compiles to the following instructions:

SQDMLSL Vd.4S,Vn.4H,Vm.H[lane]

Argument Preparation
a register: Vd.4Sb register: Vn.4Hv register: Vm.4Hlane minimum: 0; maximum: 3
Architectures
v7, A32, A64

Operation

No operation information.