vqrdmlahq_s16
SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
---|---|---|---|---|---|
Neon | int16x8_t | vqrdmlahq_s16 | (int16x8_t a, int16x8_t b, int16x8_t c) | Vector arithmetic / Multiply / Saturating multiply-accumulate | |
Description Signed Saturating Rounding Doubling Multiply Accumulate returning High Half (vector). This instruction multiplies the vector elements of the first source SIMD&FP register with the corresponding vector elements of the second source SIMD&FP register without saturating the multiply results, doubles the results, and accumulates the most significant half of the final results with the vector elements of the destination SIMD&FP register. The results are rounded. Results Vd.8H result This intrinsic compiles to the following instructions: SQRDMLAH Argument Preparation a register: Vd.8Hb register: Vn.8Hc register: Vm.8H Architectures A64 Operation
|