vqrdmulh_lane_s16
| SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
|---|---|---|---|---|---|
| Neon | int16x4_t | vqrdmulh_lane_s16 | (int16x4_t a, int16x4_t v, const int lane) | Vector arithmetic / Multiply / Saturating multiply by scalar and widen | |
Description Vector rounding saturating doubling multiply high by scalar Results Vd.4H result This intrinsic compiles to the following instructions: SQRDMULH Argument Preparation a register: Vn.4Hv register: Vm.4Hlane minimum: 0; maximum: 3 Architectures v7, A32, A64 OperationNo operation information. | |||||
Copyright © 1995-2025 Arm Limited (or its affiliates). All rights reserved.