vqshluh_n_s16
SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
---|---|---|---|---|---|
Neon | uint16_t | vqshluh_n_s16 | (int16_t a, const int n) | Shift / Left / Vector saturating shift left | |
Description Signed saturating Shift Left Unsigned (immediate). This instruction reads each signed integer value in the vector of the source SIMD&FP register, shifts each value by an immediate value, saturates the shifted result to an unsigned integer value, places the result in a vector, and writes the vector to the destination SIMD&FP register. The results are truncated. For rounded results, see UQRSHL. Results Hd result This intrinsic compiles to the following instructions: SQSHLU Argument Preparation a register: Hnn minimum: 0; maximum: 15 Architectures A64 Operation
|
Copyright © 1995-2025 Arm Limited (or its affiliates). All rights reserved.