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SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonuint32_tvqshlus_n_s32(int32_t a, const int n)Shift / Left / Vector saturating shift left
Description
Signed saturating Shift Left Unsigned (immediate). This instruction reads each signed integer value in the vector of the source SIMD&FP register, shifts each value by an immediate value, saturates the shifted result to an unsigned integer value, places the result in a vector, and writes the vector to the destination SIMD&FP register. The results are truncated. For rounded results, see UQRSHL.
Results
Sd result
This intrinsic compiles to the following instructions:

SQSHLU Sd,Sn,#n

Argument Preparation
a register: Snn minimum: 0; maximum: 31
Architectures
A64

Operation

CheckFPAdvSIMDEnabled64();
bits(datasize) operand  = V[n];
bits(datasize) result;
integer element;
boolean sat;

for e = 0 to elements-1
    element = Int(Elem[operand, e, esize], src_unsigned) << shift;
    (Elem[result, e, esize], sat) = SatQ(element, esize, dst_unsigned);
    if sat then FPSR.QC = '1';

V[d] = result;