vqshrnh_n_u16
SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
---|---|---|---|---|---|
Neon | uint8_t | vqshrnh_n_u16 | (uint16_t a, const int n) | Shift / Right / Vector saturating shift right and narrow | |
Description Unsigned saturating Shift Right Narrow (immediate). This instruction reads each vector element in the source SIMD&FP register, right shifts each result by an immediate value, saturates each shifted result to a value that is half the original width, puts the final result into a vector, and writes the vector to the lower or upper half of the destination SIMD&FP register. All the values in this instruction are unsigned integer values. The results are truncated. For rounded results, see UQRSHRN. Results Bd result This intrinsic compiles to the following instructions: UQSHRN Argument Preparation a register: Hnn minimum: 1; maximum: 8 Architectures A64 Operation
|
Copyright © 1995-2025 Arm Limited (or its affiliates). All rights reserved.