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SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonint64_tvqsubd_s64(int64_t a, int64_t b)Vector arithmetic / Subtract / Saturating subtract
Description
Signed saturating Subtract. This instruction subtracts the element values of the second source SIMD&FP register from the corresponding element values of the first source SIMD&FP register, places the results into a vector, and writes the vector to the destination SIMD&FP register.
Results
Dd result
This intrinsic compiles to the following instructions:

SQSUB Dd,Dn,Dm

Argument Preparation
a register: Dnb register: Dm
Architectures
A64

Operation

CheckFPAdvSIMDEnabled64();
bits(datasize) operand1 = V[n];
bits(datasize) operand2 = V[m];
bits(datasize) result;
integer element1;
integer element2;
integer diff;
boolean sat;

for e = 0 to elements-1
    element1 = Int(Elem[operand1, e, esize], unsigned);
    element2 = Int(Elem[operand2, e, esize], unsigned);
    diff = element1 - element2;
    (Elem[result, e, esize], sat) = SatQ(diff, esize, unsigned);
    if sat then FPSR.QC = '1';

V[d] = result;