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SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonint8x8_tvqtbx3_s8(int8x8_t a, int8x16x3_t t, uint8x8_t idx)Table lookup / Extended table lookup
Description
Table vector lookup extension. This instruction reads each value from the vector elements in the index source SIMD&FP register, uses each result as an index to perform a lookup in a table of bytes that is described by one to four source table SIMD&FP registers, places the lookup result in a vector, and writes the vector to the destination SIMD&FP register. If an index is out of range for the table, the existing value in the vector element of the destination register is left unchanged. If more than one source register is used to describe the table, the first source register describes the lowest bytes of the table.
Results
Vd.8B result
This intrinsic compiles to the following instructions:

TBX Vd.8B,{Vn.16B - Vn+2.16B},Vm.8B

Argument Preparation
a register: Vd.8Bt register: Vn.16Bidx register: Vm.8B
Architectures
A64

Operation

CheckFPAdvSIMDEnabled64();
bits(datasize) indices = V[m];
bits(128*regs) table = Zeros();
bits(datasize) result;
integer index;

// Create table from registers
for i = 0 to regs - 1
    table<128*i+127:128*i> = V[n];
    n = (n + 1) MOD 32;

result = if is_tbl then Zeros() else V[d];
for i = 0 to elements - 1
    index = UInt(Elem[indices, i, 8]);
    if index < 16 * regs then
        Elem[result, i, 8] = Elem[table, index, 8];

V[d] = result;