vrax1q_u64
SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
---|---|---|---|---|---|
Neon | uint64x2_t | vrax1q_u64 | (uint64x2_t a, uint64x2_t b) | Logical / Rotate and exclusive OR | |
Description Rotate and Exclusive OR rotates each 64-bit element of the 128-bit vector in a source SIMD&FP register left by 1, performs a bitwise exclusive OR of the resulting 128-bit vector and the vector in another source SIMD&FP register, and writes the result to the destination SIMD&FP register. Results Vd.2D result This intrinsic compiles to the following instructions: RAX1 Argument Preparation a register: Vn.2Db Architectures A64 Operation |
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