SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonint64x1_tvreinterpret_s64_p64(poly64x1_t a)Data type conversion / Reinterpret casts
Description
Vector reinterpret cast operation
Results
Vd.1D result
This intrinsic compiles to the following instructions:
Argument Preparation
a register: Vd.1D
Architectures
A32, A64

Operation

No operation information.