SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonint8x8_tvreinterpret_s8_s64(int64x1_t a)Data type conversion / Reinterpret casts
Description
Vector reinterpret cast operation
Results
Vd.8B result
This intrinsic compiles to the following instructions:
Argument Preparation
a register: Vd.1D
Architectures
v7, A32, A64

Operation

No operation information.