SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonuint32x2_tvreinterpret_u32_f32(float32x2_t a)Data type conversion / Reinterpret casts
Description
Vector reinterpret cast operation
Results
Vd.2S result
This intrinsic compiles to the following instructions:
Argument Preparation
a register: Vd.2S
Architectures
v7, A32, A64

Operation

No operation information.