vreinterpretq_f16_u8
SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
---|---|---|---|---|---|
Neon | float16x8_t | vreinterpretq_f16_u8 | (uint8x16_t a) | Data type conversion / Reinterpret casts | |
Description Vector reinterpret cast operation Results Vd.8H result This intrinsic compiles to the following instructions: Argument Preparation a register: Vd.16B Architectures v7, A32, A64 OperationNo operation information. |
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