vreinterpretq_f32_f64
| SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
|---|---|---|---|---|---|
| Neon | float32x4_t | vreinterpretq_f32_f64 | (float64x2_t a) | Data type conversion / Reinterpret casts | |
Description Vector reinterpret cast operation Results Vd.4S result This intrinsic compiles to the following instructions: Argument Preparation a register: Vd.2D Architectures A64 OperationNo operation information. | |||||
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