SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonpoly128_tvreinterpretq_p128_s16(int16x8_t a)Data type conversion / Reinterpret casts
Description
Vector reinterpret cast operation
Results
Vd.1Q result
This intrinsic compiles to the following instructions:
Argument Preparation
a register: Vd.8H
Architectures
A32, A64

Operation

No operation information.