SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonuint16x8_tvreinterpretq_u16_s16(int16x8_t a)Data type conversion / Reinterpret casts
Description
Vector reinterpret cast operation
Results
Vd.8H result
This intrinsic compiles to the following instructions:
Argument Preparation
a register: Vd.8H
Architectures
v7, A32, A64

Operation

No operation information.