SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonuint32x4_tvreinterpretq_u32_p64(poly64x2_t a)Data type conversion / Reinterpret casts
Description
Vector reinterpret cast operation
Results
Vd.4S result
This intrinsic compiles to the following instructions:
Argument Preparation
a register: Vd.2D
Architectures
A32, A64

Operation

No operation information.