SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonuint64x2_tvreinterpretq_u64_s8(int8x16_t a)Data type conversion / Reinterpret casts
Description
Vector reinterpret cast operation
Results
Vd.2D result
This intrinsic compiles to the following instructions:
Argument Preparation
a register: Vd.16B
Architectures
v7, A32, A64

Operation

No operation information.