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SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonfloat64x1_tvrnd32z_f64(float64x1_t a)Vector arithmetic / Rounding
Description
Floating-point Round to 32-bit Integer toward Zero (vector). This instruction rounds a vector of floating-point values in the SIMD&FP source register to integral floating-point values that fit into a 32-bit integer size using the Round towards Zero rounding mode, and writes the result to the SIMD&FP destination register.
Results
Dd result
This intrinsic compiles to the following instructions:

FRINT32Z Dd,Dn

Argument Preparation
a register: Dn
Architectures
A64

Operation

CheckFPAdvSIMDEnabled64();
bits(datasize) operand = V[n];
bits(datasize) result;
bits(esize) element;

for e = 0 to elements-1
    element = Elem[operand, e, esize];
    Elem[result, e, esize] = FPRoundIntN(element, FPCR[], rounding, intsize);

V[d] = result;