SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonint64x1_tvset_lane_s64(int64_t a, int64x1_t v, const int lane)Vector manipulation / Set vector lane
Description
Move vector element to another vector element
Results
Vd.1D result
This intrinsic compiles to the following instructions:

MOV Vd.D[lane],Rn

Argument Preparation
a register: Rnv register: Vd.1Dlane minimum: 0; maximum: 0
Architectures
v7, A32, A64

Operation

No operation information.