vsetq_lane_f16
SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
---|---|---|---|---|---|
Neon | float16x8_t | vsetq_lane_f16 | (float16_t a, float16x8_t v, const int lane) | Vector manipulation / Set vector lane | |
Description Move vector element to another vector element Results Vd.8H result This intrinsic compiles to the following instructions: MOV Argument Preparation a register: VnHv register: Vd.8Hlane minimum: 0; maximum: 7 Architectures v7, A32, A64 OperationNo operation information. |
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