vsetq_lane_p8
| SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
|---|---|---|---|---|---|
| Neon | poly8x16_t | vsetq_lane_p8 | (poly8_t a, poly8x16_t v, const int lane) | Vector manipulation / Set vector lane | |
Description Move vector element to another vector element Results Vd.16B result This intrinsic compiles to the following instructions: MOV Argument Preparation a register: Rnv register: Vd.16Blane minimum: 0; maximum: 15 Architectures v7, A32, A64 OperationNo operation information. | |||||
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