SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonint8x16_tvsetq_lane_s8(int8_t a, int8x16_t v, const int lane)Vector manipulation / Set vector lane
Description
Move vector element to another vector element
Results
Vd.16B result
This intrinsic compiles to the following instructions:

MOV Vd.B[lane],Rn

Argument Preparation
a register: Rnv register: Vd.16Blane minimum: 0; maximum: 15
Architectures
v7, A32, A64

Operation

No operation information.