SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonuint16x8_tvsetq_lane_u16(uint16_t a, uint16x8_t v, const int lane)Vector manipulation / Set vector lane
Description
Move vector element to another vector element
Results
Vd.8H result
This intrinsic compiles to the following instructions:

MOV Vd.H[lane],Rn

Argument Preparation
a register: Rnv register: Vd.8Hlane minimum: 0; maximum: 7
Architectures
v7, A32, A64

Operation

No operation information.