SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonuint64x2_tvsetq_lane_u64(uint64_t a, uint64x2_t v, const int lane)Vector manipulation / Set vector lane
Description
Move vector element to another vector element
Results
Vd.2D result
This intrinsic compiles to the following instructions:

MOV Vd.D[lane],Rn

Argument Preparation
a register: Rnv register: Vd.2Dlane minimum: 0; maximum: 1
Architectures
v7, A32, A64

Operation

No operation information.