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SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonuint64x1_tvshl_n_u64(uint64x1_t a, const int n)Shift / Left / Vector shift left
Description
Shift Left (immediate). This instruction reads each value from a vector, left shifts each result by an immediate value, writes the final result to a vector, and writes the vector to the destination SIMD&FP register.
Results
Dd result
This intrinsic compiles to the following instructions:

SHL Dd,Dn,#n

Argument Preparation
a register: Dnn minimum: 0; maximum: 63
Architectures
v7, A32, A64

Operation

CheckFPAdvSIMDEnabled64();
bits(datasize) operand  = V[n];
bits(datasize) result;

for e = 0 to elements-1
    Elem[result, e, esize] = LSL(Elem[operand, e, esize], shift);

V[d] = result;