vshld_n_s64
SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
---|---|---|---|---|---|
Neon | int64_t | vshld_n_s64 | (int64_t a, const int n) | Shift / Left / Vector shift left | |
Description Shift Left (immediate). This instruction reads each value from a vector, left shifts each result by an immediate value, writes the final result to a vector, and writes the vector to the destination SIMD&FP register. Results Dd result This intrinsic compiles to the following instructions: SHL Argument Preparation a register: Dnn minimum: 0; maximum: 63 Architectures A64 Operation |
Copyright © 1995-2025 Arm Limited (or its affiliates). All rights reserved.