vshlq_n_s16
SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
---|---|---|---|---|---|
Neon | int16x8_t | vshlq_n_s16 | (int16x8_t a, const int n) | Shift / Left / Vector shift left | |
Description Shift Left (immediate). This instruction reads each value from a vector, left shifts each result by an immediate value, writes the final result to a vector, and writes the vector to the destination SIMD&FP register. Results Vd.8H result This intrinsic compiles to the following instructions: SHL Argument Preparation a register: Vn.8Hn minimum: 0; maximum: 15 Architectures v7, A32, A64 Operation |
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