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SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonuint32x4_tvsm4eq_u32(uint32x4_t a, uint32x4_t b)Cryptography / SM4
Description
SM4 Encode takes input data as a 128-bit vector from the first source SIMD&FP register, and four iterations of the round key held as the elements of the 128-bit vector in the second source SIMD&FP register. It encrypts the data by four rounds, in accordance with the SM4 standard, returning the 128-bit result to the destination SIMD&FP register.
Results
Vd.4S result
This intrinsic compiles to the following instructions:

SM4E Vd.4S,Vn.4S

Argument Preparation
a register: Vd.4Sb
Architectures
A64

Operation

AArch64.CheckFPAdvSIMDEnabled();

bits(128) Vn = V[n];
bits(32) intval; 
bits(8) sboxout;
bits(128) roundresult;
bits(32) roundkey;

roundresult=V[d];
for index = 0 to 3
    roundkey = Elem[Vn,index,32];

    intval = roundresult<127:96> EOR roundresult<95:64> EOR roundresult<63:32> EOR roundkey; 

    for i = 0 to 3  
        Elem[intval,i,8]  = Sbox(Elem[intval,i,8]); 

    intval = intval EOR ROL(intval,2) EOR ROL(intval,10) EOR ROL(intval,18) EOR ROL(intval,24);
    intval = intval EOR roundresult<31:0>; 

    roundresult<31:0> = roundresult<63:32>;
    roundresult<63:32> = roundresult<95:64>;
    roundresult<95:64> = roundresult<127:96>;
    roundresult<127:96> = intval; 
V[d] = roundresult;