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SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonint32x4_tvsudotq_laneq_s32(int32x4_t r, int8x16_t a, uint8x16_t b, const int lane)Vector arithmetic / Dot product
Description
Dot product index form with signed and unsigned integers. This instruction performs the dot product of the four signed 8-bit integer values in each 32-bit element of the first source register with the four unsigned 8-bit integer values in an indexed 32-bit element of the second source register, accumulating the result into the corresponding 32-bit element of the destination vector.
Results
Vd.4S result
This intrinsic compiles to the following instructions:

SUDOT Vd.4S,Vn.16B,Vm.4B[lane]

Argument Preparation
r register: Vd.4Sa register: Vn.8Bb register: Vm.4Blane minimum: 0; maximum: 3
Architectures
A64

Operation

CheckFPAdvSIMDEnabled64();
bits(datasize) operand1 = V[n];
bits(128)      operand2 = V[m];
bits(datasize) operand3 = V[d];
bits(datasize) result;

for e = 0 to elements-1
    bits(32) res = Elem[operand3, e, 32];
    for b = 0 to 3
        integer element1 = Int(Elem[operand1, 4 * e + b, 8], op1_unsigned);
        integer element2 = Int(Elem[operand2, 4 * i + b, 8], op2_unsigned);
        res = res + element1 * element2;
    Elem[result, e, 32] = res;
V[d] = result;