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SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonint32x2_tvuzp1_s32(int32x2_t a, int32x2_t b)Vector manipulation / Unzip elements
Description
Unzip vectors (primary). This instruction reads corresponding even-numbered vector elements from the two source SIMD&FP registers, starting at zero, places the result from the first source register into consecutive elements in the lower half of a vector, and the result from the second source register into consecutive elements in the upper half of a vector, and writes the vector to the destination SIMD&FP register.
Results
Vd.2S result
This intrinsic compiles to the following instructions:

UZP1 Vd.2S,Vn.2S,Vm.2S

Argument Preparation
a register: Vn.2Sb register: Vm.2S
Architectures
A64

Operation

CheckFPAdvSIMDEnabled64();
bits(datasize) operandl = V[n];
bits(datasize) operandh = V[m];
bits(datasize) result;

bits(datasize*2) zipped = operandh:operandl;
for e = 0 to elements-1
    Elem[result, e, esize] = Elem[zipped, 2*e+part, esize];

V[d] = result;