vuzp2_f32
SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
---|---|---|---|---|---|
Neon | float32x2_t | vuzp2_f32 | (float32x2_t a, float32x2_t b) | Vector manipulation / Unzip elements | |
Description Unzip vectors (secondary). This instruction reads corresponding odd-numbered vector elements from the two source SIMD&FP registers, places the result from the first source register into consecutive elements in the lower half of a vector, and the result from the second source register into consecutive elements in the upper half of a vector, and writes the vector to the destination SIMD&FP register. Results Vd.2S result This intrinsic compiles to the following instructions: UZP2 Argument Preparation a register: Vn.2Sb register: Vm.2S Architectures A64 Operation |
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