Debug Access Port
In the external debug model, Debug registers are accessed using the external debug interface. The means to access external debug interface is IMPLEMENTATION DEFINED. However, most Armv8-A systems include a Debug Access Port (DAP) to access the external debug interface for off-chip external debuggers. On-chip external debuggers, for example, using a second PE to debug a PE, use the memory mapped interface to access the external debug interface.
The following diagram illustrates access to the external debug interface using a DAP:
External debug interface using DAP
External Debug registers, also called halt mode debug registers, are usually prefixed with ED, for example, EDSCR. Two important external Debug registers are:
- EDSCR: External Debug Status and Control Register
- EDECR: External Debug Execution Control Register