Overview Why you should care about the ISA Instruction sets in the Arm architecture Instruction set resources Simple sequential execution Registers in AArch64 - general-purpose registers Registers in AArch64 - other registers Registers in AArch64 - system registers Data processing - arithmetic and logic operations Data processing - floating point Data processing - bit manipulation Data processing - extension and saturation Data processing - format conversion Data processing - vector data Loads and stores Loads and stores - size Loads and stores - zero and sign extension Loads and stores - addressing Loads and stores - load pair and store pair Loads and stores - using floating point registers Program flow Program flow - loops and decisions Program flow - generating condition code Program flow - conditional select instructions Function calls Procedure Call Standard System calls Check your knowledge Related information Next steps
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Format conversion

We have seen that the MOV and MVN instructions copy the value from one register to another. Similarly, FMOV can be used to copy between floating-point and general purpose registers.

However, using FMOV copies the literal bit pattern between the registers. There are also instructions that can convert to the closest representation, as this figure shows:

 

In this example, imagine that X0 contains the value 2 (positive integer 2):

X0 = 0x0000_0000_0000_0002

Then, the following sequence is executed:

FMOV D0, X0


SCVTF D1, X0

Both instructions “copy” X0 into a D register. However, the results are quite different:

D0 = 0x0000_0000_0000_0002 = 9.88131e-324

D1 = 0x4000_0000_0000_0002 = 2.0

The FMOV copied the literal bit pattern, which is a very different value when interpreted as a floating-point value. The SCVTF converted the value in X0 to the closest equivalent in floating-point.

Similarly, FCTxx can be used to convert a floating-point value to its closest integer representation. In this instance, different values of 'xx' control the rounding mode used.

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