Overview Why you should care about the ISA Instruction sets in the Arm architecture Instruction set resources Simple sequential execution Registers in AArch64 - general-purpose registers Registers in AArch64 - other registers Registers in AArch64 - system registers Data processing - arithmetic and logic operations Data processing - floating point Data processing - bit manipulation Data processing - extension and saturation Data processing - format conversion Data processing - vector data Loads and stores Loads and stores - size Loads and stores - zero and sign extension Loads and stores - addressing Loads and stores - load pair and store pair Loads and stores - using floating point registers Program flow Program flow - loops and decisions Program flow - generating condition code Program flow - conditional select instructions Function calls Procedure Call Standard System calls Check your knowledge Related information Next steps
Using floating point registers
Loads and stores can also be carried out using the floating-point registers, as we will see here. The first instruction loads 64-bits from [X0] into D1:
LDR D1, [X0]
This second instruction stores 128-bits from Q0 to [X0 + X1]:
STR Q0, [X0, X1]
Finally, this instruction loads a pair of 128-bit values from X5, then increments X5 by 256:
LDP Q1, Q3, [X5], #256
There are some restrictions:
- The size is specified by the register type only.
- There is no option to sign extend loads.
- The address must still be an
Xregister.
Load and stores using floating-point registers can be found in unexpected cases. It is common for memcpy() type routines to use them. This is because the wider register means that fewer iterations are needed. Just because your code does not use floating-point values, don't assume that you won't need to use the floating-point registers.