External debug

An external debug model is used when a debugger is hosted external to the PE that is being debugged. The external debugger can control the PE with the following operations:

  • Stopping the program execution on the occurrence of debug events
  • Checking the status of the architectural registers
  • Modifying the status of the architectural registers
  • Running instructions on the PE to access memory

The external debugger controls the entry of the core into Debug state, by configuring a debug event. A debug event is configured by either programming debug logic, or by asserting a debug halt request through a signal to the core. The following diagram illustrates the setup of an external debugger:

External debugger
External debugger

External debug interface

In Debug state, the PE executes instructions in the Instruction Transfer Register (ITR). The external debugger inserts instructions into the ITR using the external debug interface. The Debug Communication Channel (DCC) allows communication between the PE and the external debugger. The following diagram illustrates the debug setup of an Arm core using an external debugger interface:

External debug interface
External debug interface

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