Floating point

Floating-point operations follow the same format as integer data-processing instructions and use floating-point registers. Like with the integer data-processing instructions, the size of the operation determines the size of the register that is used.  The operation part of a floating-point instruction always starts with an F. For example, this instruction sets H0 = H1 / H2 with half precision:

FDIV	H0, H1, H2

This instruction sets S0 = S1 + S2 with single precision:

FADD	S0, S1, S2	

This instruction sets D0 = D1 - D2 with double precision:

FSUB	D0, D1, D2

Support for half precision (16 bit) was added in Armv8.2-A and is optional. Support for half-precision is reported by ID_AA64PFR0_EL1.

Access to floating point registers can be trapped. This means that any attempt to use floating point registers will generate an exception. Trapping is discussed in more detail the exception model guide.

Is floating point support optional?

No. Support for floating point is mandatory in Armv8-A. The architecture specifies that it is required whenever a rich operating system, such as Linux, is used.

You are technically permitted to omit floating point support, if you are running an entirely proprietary software stack. Most toolchains, including GCC and Arm Compiler 6, will assume floating point support.

Previous Next