The vector tables

In Armv8-A, vector tables are an area of normal memory containing instructions. The processor element (PE) holds the base address of the table in a System register, and each exception type has a defined offset from that base.

The privileged Exception levels each have their own vector table defined by a Vector Base Address Register, VBAR_ELx, where <x> is 1,2, or 3.

The values of the VBAR registers are undefined after reset, so they must be configured before interrupts are enabled.

The format of the vector table is shown below:

This image shows the vector table for Armv8-A. 

Each exception type can cause a branch to one of four locations based on the state of the Exception level the exception was taken from.

Previous Next