Armv8.x extensions and features

Here we summarize the new features that were added in each of the Armv8.x-A extensions. We do not provide a complete list, but we include the most important features. Notice that some features are limited to the AArch64 state, and others are available in both the AArch32 and AArch64 states.

Note: AArch32 is a 32-bit Execution state that is supported in all versions of Arm architecture before Armv8-A. AArch64 is a 64-bit Execution state and is supported only in the Armv8-A architecture.

  • Atomic memory access instructions (AArch64)
  • Limited Order regions (AArch64)
  • Increased Virtual Machine Identifier (VMID) size, and Virtualization Host Extensions (AArch64)
  • Privileged Access Never (PAN) (AArch32 and AArch64)
  • Support for 52-bit addresses (AArch64)
  • The ability for PEs to share Translation Lookaside Buffer (TLB) entries (AArch32 and AArch64)
  • FP16 data processing instructions (AArch32 and AArch64)
  • Statistical profiling (AArch64)
  • Reliability Availability Serviceabilty (RAS) support becomes mandatory (AArch32 and AArch64)
  • Pointer authentication (AArch64)
  • Nested virtualization (AArch64)
  • Advanced Single Instruction Multiple Data (SIMD) complex number support (AArch32 and AArch64)
  • Improved JavaScript data type conversion support (AArch32 and AArch64)
  • A change to the memory consistency model (AArch64)
  • ID mechanism support for larger system-visible caches (AArch32 and AArch64)
  • Secure virtualization (AArch64)
  • Nested virtualization enhancements (AArch64)
  • Small translation table support (AArch64)
  • Relaxed alignment restrictions (AArch32 and AArch64)
  • Memory Partitioning and Monitoring (MPAM) (AArch32 and AArch64)
  • Additional crypto support (AArch32 and AArch64)
  • Generic counter scaling (AArch32 and AArch64)
  • Instructions to accelerate SHA512 and SHA3 (AArch64 only)
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