Trace refers to the process of capturing data that illustrates how the components in a design are operating, executing, and performing.
The ability to trace a target depends on what trace facilities the target offers. For example, you can only store trace data on a target for later analysis if the target offers the facilities to do so. If you have questions about the trace capabilities of your target, refer to the target manufacturer, target designer, and target documentation.
The Arm approach to trace usually involves a separate trace generation component for each type of trace that is performed. For example, different trace sources produce processor trace and bus trace.
In this section of the guide, we look at the different kinds of trace and the components that produce them.
Instruction trace generates information about the instruction execution of a core or processor. In a simple example, if a core executes a loop ten times and instruction trace is enabled, the decoded instruction trace data shows the associated loop code ten times.
The following diagram shows two iterations of a simple loop example through instruction trace:
The trace capabilities of your target might allow additional information, for example cycle counter numbers or timestamps, to be captured alongside the trace data. You can choose the additional information that best fits your tracing requirements.
The Arm trace sources that generate instruction trace are the Embedded Trace Macrocell (ETM) and the Program Trace Macrocell (PTM). Whether a target includes an ETM or a PTM depends on the processor that is in the design. Armv8 designs have an ETM. Most Armv7 designs have a PTM.
Data trace generates information about the data accesses of a core or processor. For example, if a memory load instruction is executed and data trace is enabled, the data trace shows a load instruction with the associated load address and value.
The following diagram shows how a data access appears through data trace:
The Embedded Trace Macrocell (ETM) is the Arm trace source that captures data trace. ETM data trace capability is an optional feature in the ETM architecture. ETMv4 does not support data trace on Armv8 or Armv7 processors.
Instrumentation trace outputs Operating System (OS) and application events and system information. For example, if an event occurs when an application runs and instrumentation trace is enabled, the environment pushes useful runtime information to the instrumentation trace source to analyze later.
The following diagram shows how Data Watchpoint and Trace unit (DWT) values that are written to an ITM appear through instrumentation trace:
Instrumentation trace is versatile, but its capabilities depend on how it is implemented in the target design. Refer to your target manufacturer, target designer, and target documentation for information on the instrumentation trace capability of your target.
Arm designs use an Instrumentation Trace Macrocell (ITM) to capture instrumentation trace data.
System trace outputs data about components across the system. For example, the STM supports both target hardware and software event generation. System trace components have a superset of the functionality of an instrumentation trace component. This means that there are many similarities between the two components.
The following diagram shows how outputting an application text string and application-generated numbers to an STM appear through system trace:
System trace is versatile, but its capabilities depend on how it is implemented in the target design. Refer to your target manufacturer, target designer, and target documentation for information on the system trace capability of your target.
Arm designs use a System Trace Macrocell (STM) to capture system trace data. The two variants are the STM and the STM-500.