Arm Frame Buffer Compression (AFBC)
Employing AFBC throughout the SoC saves significant system bandwidth and power
The Arm Frame Buffer Compression (AFBC) protocol addresses the difficulty of creating increasingly more complex designs within the thermal limit of a mobile device. One of the most bandwidth intensive use cases is video post processing. In many use cases, the GPU is required to read a video and apply effects when using video streams as textures in 2D or 3D scenes. In such cases it reduces the overall system level bandwidth and power cost of transferring spatially coordinated image data throughout the system by up to 50%.
A lossless image compression protocol and format, AFBC minimizes the amount of data transferred between IP blocks within a SoC. Its lossless compression ratios are comparable with other leading standards but with the added benefit of fine grained random access, which importantly allows for the application of AFBC throughout other IP blocks within your SoC design.