This page provides an overview of our AMBA developer tools, including the AMBA IP-XACT bus definitions, the AMBA TLM library, and the AMBA protocol checkers. The page also includes links to useful resources, such as AMBA specifications, AMBA training, and the SoC Design Forum. These tools should be helpful to SoC developers with AMBA experience and developers getting started with AMBA. If you cannot find what you are looking for, please contact us using the link at the bottom of this page.

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AMBA IP-XACT Bus Definitions | AMBA TLM Library | AMBA ATP Engine | Protocol Checkers
AMBA Viz | Training


AMBA IP-XACT Bus Definitions

The AMBA IP-XACT Bus Definitions describe the AMBA protocols using the IP-XACT (IEEE 1685-2009) format. They describe the interfaces that implement the AMBA protocols. They also provide details for the interface signals, for example signal direction, width, default value, and whether a signal is required or optional.

The bus definitions facilitate the description, exchange, and integration of compatible IP designs. They also facilitate the development of tools for the generation and configuration of IP that implement AMBA interfaces.

Redistribution of the bus definitions is permitted. You can see details in the End User License Agreement included in the bus definitions package.


Download the IP-XACT bus definitions


AMBA TLM Library

The AMBA Transaction-Level Modeling (TLM) Library allows the modeling and simulation of approximately timed (AT) and cycle-accurate (CA) AMBA AXI4 and ACE interfaces.

The AMBA TLM Library is developed in C++ and is provided as a pre-compiled binary library. It is intended for use with:

  • Arm Cycle Models
  • Custom AT and CA models that are used for virtual prototype development
  • Third-party models that use supported AMBA interfaces

Learn more about the Transaction-Level Modeling library

Learn more

AMBA ATP Engine 

The AMBA ATP Engine is a software module that generates synthetic traffic described with the AMBA Adaptive Traffic Profiles (AMBA ATP) specification. The AMBA ATP Engine defines a file format for the input of traffic profiles and exposes an event-driven C/C++ API, for integrating to host platforms. The ATP Engine is platform-independent and can be integrated into different modeling, simulation, and testing tools such as gem5 and verification IPs (VIPs).

AMBA ATP is a synthetic traffic framework and is capable of modeling systems' high-level memory access behavior in a concise, simple, and portable way. Traffic Profiles can be used across multiple tools and design and verification environments to assist with the design and verification of complex SoCs. Among other use cases, they enable a simpler and faster simulation mechanism that is, at the same time, predictable and adaptive.

Download the AMBA ATP Engine


Protocol Checkers

Protocol Checkers (PCs) observe interface traffic and monitor transactions against a series of protocol rules (assertions). System designers, integrators, and verification engineers can use PCs to confirm that a design complies with the relevant AMBA protocols.

Protocol checkers are written in SystemVerilog Assertion (SVA) and are provided with user guides, which show how to integrate them into a design.

Download the AMBA 4, AXI4 AXI4-Lite and AXI4-Stream SVAs


Download the AMBA 4 ACE and ACE-Lite SVAs


Download the AMBA 3 AXI SVAs



AMBA Viz is a visualization application for viewing and interacting with hardware events and messages between components within a system. The technology enables faster, more intuitive debug capability, combining low-level hardware events into something more meaningful. AMBA Viz gives verification and validation engineers a standard solution to tracing hardware signals and processing them with scripts, which they can write once and re-use many times, significantly reducing engineering hours.


  • Full transaction and protocol message tracking with hang detection and root-cause analysis.
  • Protocol specification sequence diagram visualization for viewing messages and transactions between components.
  • Optimized processing of waveforms using VCD and FSDB format.
  • Automatic detection of supported Arm IP in any RTL test bench.
  • Topology visualization for supported interconnects such as Arm® CoreLink™ CMN-600 Coherent Mesh Network.

Access AMBA Viz

AMBA Viz is available as part of Arm Success Kits, which provide easy access to all the tools and models from Arm.

Learn more

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Download the AMBA Specifications


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Visit the SoC Design Forum


Training videos

To access freely available, on-demand AMBA training videos, visit our training page through the link below. On this page you will find introductory videos to AMBA and the AMBA specifications, as well as short training videos for AMBA AXI and AMBA CHI.



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